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Time Delay Circuit
Time Delay Circuit In the design of analog circuits, there are times when you would need to delay a pulse that came into a circuit before being used for the next process. This time delay circuit uses a 555 timer to delay a pulse that comes in to a maximum time of 75 seconds. The timing of the delay can also be changed by changing the resistor value of VR1 and the capacitor value of E based on the time delay formula of t=0.69RC. In order for the output to go high, the reset pin of 555 timer (pin 4) must be high and the TRIGGER pin (pin 2) voltage level must be below a third of the level of the power supply to the IC. When there is no pulse being applied to the input, transistor Q1 will turn ON and capacitor E is charged.
Once a pulse is applied to the input, transistor Q1 will turn OFF and pin 4 reset pin is held to high. This caused the capacitor E1 to be discharged through VR1 resistor. The time delay will depend on the discharged of capacitor E to a third of the supply before the output of 555 goes high. Experiment with different values of VR1 and E to get different time delay. If the maximum value of potentiometer is set to 5M ohm, the time delay of the pulse will be 75 seconds.
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